Key Formulas & Truth Tables
(A + B)' = A' · B'
(A · B)' = A' + B'
The complement of a sum equals the product of complements; the complement of a product equals the sum of complements
A + 0 = A, A · 1 = A (Identity)
A + 1 = 1, A · 0 = 0 (Domination)
A + A = A, A · A = A (Idempotent)
A + A' = 1, A · A' = 0 (Complement)
Distributive: A(B+C) = AB + AC, A + BC = (A+B)(A+C)
OR Gate: Y = A + B — output 1 when ANY input is 1
XOR Gate: Y = A ⊕ B = A'B + AB' — output 1 when inputs differ
Core Concepts
Basic building blocks of digital circuits: AND, OR, NOT (inverter), NAND, NOR, XOR, XNOR. Any Boolean function can be implemented using only NAND gates (or only NOR gates) — functional completeness.
Circuits whose outputs depend ONLY on current inputs — no memory. Examples: multiplexers, demultiplexers, encoders, decoders, adders (half adder, full adder), comparators.
Circuits with memory — outputs depend on current inputs AND previous state. Built using flip-flops: SR, D, JK, T. Examples: registers, counters, shift registers, finite state machines.
Graphical method for simplifying Boolean expressions. Group adjacent 1s in powers of 2 (1, 2, 4, 8...). Larger groups → simpler terms. Limited to 4-6 variables practically.
Binary (base-2): 0,1. Octal (base-8): 0-7. Hexadecimal (base-16): 0-F. Conversion: group binary digits in 3s (octal) or 4s (hex). Two's complement for signed arithmetic.
Core Definitions
Worked Examples
F(A,B,C) = Σ(0,2,4,6) — group all four 1s in one group of 4.
All four share C' (C=0) → F = C'
Inputs: A, B. Outputs: Sum, Carry.
Sum = A ⊕ B (XOR gate)
Carry = A · B (AND gate)
F = (A + B)' → NAND implementation: Connect A and B to a NAND gate.
F = (A · B)' → NOR implementation: Connect A and B to a NOR gate.
Practice Problems
Answer: A' · B' · C'
Answer: Hex: B6; Octal: 266
Answer: All four cells except AB → F = A' + B'
Answer: 0 (XOR outputs 1 only when inputs differ)
Answer: Any Boolean function can be implemented using only NAND gates. NOT = NAND with tied inputs. AND = NAND followed by NOT (two NANDs). OR = NAND with inverted inputs (using De Morgan's).